1. Technical Field
The present invention relates to semiconductor memory devices, and more particularly, to a Decision Feedback Equalizer (DFE) circuit for use in a semiconductor memory device and an initializing method thereof, which is capable of initializing the DFE circuit in the semiconductor memory device with a discontinuous data transmission, and of compensating for a feedback delay.
2. Description
Recent developments in the area of semiconductor technology are bringing about an increase of clock frequency and an increase of data transmission rate. Particularly, a data rate between a memory and a memory controller is increasing, causing a distortion in waveforms of data transmitted through a data channel. One such cause is an Inter-Symbol Interference (ISI). The ISI is an effect where previous data have an influence on the currently transmitted data due to a limit of data channel bandwidth.
In one method widely used for reducing the ISI effect, a decision feedback equalizer (DFE) is employed. To normally operate the DFE circuit, previous data needs to be known exactly. For example, when there is an error in a reception of previous data owing to an operation of the DFE circuit or influence of ISI, etc., an incorrect logical operation is performed in receiving current transmission data, causing errors in a reception of the current transmission data. In a relatively worst case, the errors may influence all transmission data bits and so may occur in all reception data.
Further, when the transmission of data is first stopped, and then is again transmitted, errors may occur from a first bit reception of transmission data in view of a characteristic of the DFE circuit since a value of previous data corresponding to a first bit of re-transmitted data has not been decided. To prevent or substantially reduce errors in the reception of transmission data, previous data corresponding to a first bit of transmission data must be recognized in transmitting the data.
In a general high speed serial link communication medium, a protocol decided in the initialization is used, and after the initialization, data is communicated continuously in packets over a data channel. Thus, in the communication medium such as the high speed serial link, previous data can always be known and so it is easy to employ the DFE circuit.
However, a data communication in a semiconductor memory device does not involve the transmission of packets, but is instead a discontinuous communication scheme where the transmission of data and a stop of the transmission are repeated by an input command. In other words, an initialization to define proper previous data corresponding to a first bit is needed at a start time point of data transmission. In a semiconductor memory device, data is transmitted after a given latency when a read/write command is applied. This provides a structure where a data channel does not continuously operate, but data is discontinuously transmitted with a given time gap. A need remains for improved methods of initialization of previous data of the DFE circuit, thereby providing a normal data reception. In addition, the conventional DFE circuit may have limited use due to feedback delays that are not compensated for, thereby resulting in undesirable delays that are not overcome.